Compiler-directed scratch pad memory optimization for embedded multiprocessors

Kandemir, M; Kadayif, İSMAİL; Choudhary, A; Ramanujam, J; Kolcu, I

doi:10.1109/tvlsi.2004.824299

Compiler-directed scratch pad memory optimization for embedded multiprocessors

Kandemir M., Kadayif I., Choudhary A., Ramanujam J., Kolcu I.

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, cilt.12, sa.3, ss.281-287, 2004 (SCI-Expanded)

Yayın Türü: Makale / Tam Makale
Cilt numarası: 12 Sayı: 3
Basım Tarihi: 2004
Doi Numarası: 10.1109/tvlsi.2004.824299
Dergi Adı: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
Derginin Tarandığı İndeksler: Science Citation Index Expanded (SCI-EXPANDED), Scopus
Sayfa Sayıları: ss.281-287
Çanakkale Onsekiz Mart Üniversitesi Adresli: Evet

Özet

This paper presents a compiler strategy to optimize data accesses in regular array-intensive applications running on embedded multiprocessor environments. Specifically, we propose an optimization algorithm that targets at reducing extra off-chip memory accesses caused by interprocessor communication. This is achieved by increasing the application-wide reuse of data that resides in scratch-pad memories of processors. Our results obtained using four array-intensive image processing applications indicate that exploiting interprocessor data sharing can reduce energy-delay product significantly on a four-processor embedded system.