Dynamic management of scratch-pad memory space


KANDEMIR M., RAMANUJAM J., IRWIN M., VIJAYKRISHNAN N., Kadayif I. , PARIKH A.

38th Design Automation Conference (DAC), Nevada, United States Of America, 18 - 22 June 2001, pp.690-695 identifier identifier

  • Publication Type: Conference Paper / Full Text
  • Volume:
  • Doi Number: 10.1145/378239.379049
  • City: Nevada
  • Country: United States Of America
  • Page Numbers: pp.690-695

Abstract

optimizations aimed at improving the efficiency of on-chip memories are extremely important. We propose a compiler-controlled dynamic on-chip scratch-pad memory (SPM) management framework that uses both loop and data transformations. Experimental results obtained using a generic cost model indicate significant reductions in data transfer activity between SPM and off-chip memory.