Influence of communication optimizations on on-chip multi-processor energy


Kadayif I. , KANDEMIR M., CHEN G.

IEEE International SOC Conference, Oregon, United States Of America, 17 - 20 September 2003, pp.255-256 identifier identifier

  • Publication Type: Conference Paper / Full Text
  • Volume:
  • Doi Number: 10.1109/soc.2003.1241508
  • City: Oregon
  • Country: United States Of America
  • Page Numbers: pp.255-256

Abstract

Designing cost-effective and scalable on-chip multi-processors demand careful attention be paid to software. In particular, if not optimized, the energy consumption due to interprocessor communication can be overwhelming. In this paper, we focus on array-intensive applications and study the energy impact of inter-processor communication optimizations on a private memory based on-chip multi-processor. Our results emphasize the importance of considering both computation energy and communication energy when applying optimizations that reduce inter-processor communication.