EURO-PAR 2004 PARALLEL PROCESSING, PROCEEDINGS, vol.3149, pp.304-309, 2004 (SCI-Expanded)
This paper presents a compiler-directed strategy for reducing energy consumption of instruction TLBs. The main idea is to restructure the code to increase the chances that one can generate virtual-to-physical address translation without going through the instruction TLB. The preliminary experimental results are promising.